Loading presentation...

Present Remotely

Send the link below via email or IM


Present to your audience

Start remote presentation

  • Invited audience members will follow you as you navigate and present
  • People invited to a presentation do not need a Prezi account
  • This link expires 10 minutes after you close the presentation
  • A maximum of 30 users can follow your presentation
  • Learn more about this feature in our knowledge base article

Do you really want to delete this prezi?

Neither you, nor the coeditors you shared it with will be able to recover it again.


Make your likes visible on Facebook?

Connect your Facebook account to Prezi and let your likes appear on your timeline.
You can change this under Settings & Account at any time.

No, thanks

Mill CPU Architecture

No description

Iman Sh

on 17 April 2014

Comments (0)

Please log in to add your comment.

Report abuse

Transcript of Mill CPU Architecture

Internal format



No general registers or rename

registers >>
fast, small, low-power bypass

No issue, dispatch, or retire stages
short pipe, low mispredict penalty

No encoded result addresses
compact code

Multi-result operations

The Mill is a new general-purpose
commercial CPU family.

Invented by Out-of-the-Box Computing.

This presentation from interview with Ivan Godard.

his group just knew they could "do better".

They worked for 10 years.

The Mill manages roughly 10% of the power
usage of other chips for the same


a 64-bit Single Address Space (SAS) .

On-CPU caches all use virtual addressing

virtualisation is performed by a Translation Lookaside Buffer (TLB).

TLB allocate virtual memory in HW

The Belt
The Belt
connecting hundreds of temporary registers to places where they’ll eventually be used eats up about half the
budget in a CPU.
solution to this problem is replacing the registers in a CPU with something called a
a weird combination of a stack and a shift register.
CPU can take data from any position on the belt, perform an operation, and places the result at the front of the belt.

Metadata reduces the number of distinct opcodes by a factor of seven.

Metadata enables speculative execution without fix-up code.

Metadata eliminates flag-control overheads in floating point.

Metadata permits vectorizing of
Mill CPU Architecture
Instructions and Pipelines

Instruction and pipelines contd.
Mill has lots of pipelines, and each one issue an operation each cyle

Thanks for listening
What is the Mill CPU?
Why it is different?
The belt.
Instruction and pipeline
Instruction execution

Full transcript