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A Day inside AM65x

Lokesh Vutla

AM57x Boot Flow

  • Boot master is A15.
  • Boot stages:

AM57x Story

ROM

  • Detect the boot media
  • Initialize the boot peripheral
  • Load file MLO
  • Jump to SPL

GP HEADER

ROM

u-boot-spl.bin

DTB 1....n

MLO

SPL

HEADER

u-boot.bin

SPL

DTB 1....n

  • Detect revision
  • Save boot media
  • Read EEPROM
  • Setup AVS class-0 voltages
  • Setup IODELAY, mux
  • Setup PLLs
  • Initialize DDR
  • Initialize boot peripherial
  • Load u-boot.img

U-Boot.img

U-Boot

  • Verify the ddr
  • Calculate reloc offset
  • Relocate to end of DDR
  • Init most commonly used peripherals
  • Load ENV
  • Provide U-Boot prompt
  • Load Kernel
  • Jump to kernel

U-Boot

Linux

  • Standard Linux boot
  • ARM specific init
  • omap hwmod init
  • smp_init
  • driver probe
  • Filesystem

Linux

K3 challanges

  • Boot is split across multiple domains
  • DMSC has secure ROM
  • MCU R5 has peripheral ROM
  • Initial bootloader should run on MCU R5
  • Auto applications should start running on MCU R5 asap
  • CAN response...
  • Bootloader should start other remote cores for various applications.
  • In production boot flow, u-boot proper might not be preferred
  • Boot flow should be common across all K3 family covering all markets.

K3 Challenges

Boot Sequence

x509 cert

FIT Header

ATF

R5 SPL

Image Formats

TEE

FIT Header

sci.bin

A53 SPL

DTB 1..N

tispl.bin

sysfw

tiboot3.bin

AM65x SoC

MPU CL0

MPU CL1

DMSC

ROM - 160K

A53_0

A53_1

WKUP peripherals

AArch64 Privilege model

M3

IMEM - 192K

L1D$ - 32KB

L1P$ - 32KB

DMEM - 80K

L2$ - 512KB

MSMC

OC-MSRAM 512KB

DDRSS

SRAM/CACHE

DRU

BOOT_ROM 192K

The Day

GPU

MCU_ARMSS

R5F1

R5F0

Dual

Lockstep

MAIN NAVSS

I$ - 16KB

GTC

D$ - 16KB

TCM - 64KB

CBASS

MCU NAVSS

UART

Other MAIN

peripherals

MMC SD

MCU Peripherals

ROM FLOW

MPU CL0

MPU CL1

DMSC

Notes:

ROM - 160K

A53_0

A53_1

A53_0

WKUP peripherals

- ROM starts

- M3: Reset R5

- M3: Copy to dst

- Start IPC

- IPC setup

- ROM starts Executing

- M3 out of reset

M3

- R5: Copy to buffers

- Init MMC

-R5 out of reset

- Enable caches

IMEM - 192K

L1D$ - 32KB

L1P$ - 32KB

L2$ - 512KB

DMEM - 80K

MSMC

SPL

OC-MSRAM

DDRSS

SRAM/CACHE

DRU

BOOT_ROM

GPU

MCU_ARMSS

MAIN NAVSS

R5F0

R5F1

Dual

Lockstep

I$ - 16KB

GTC

D$ - 16KB

TCM - 64KB

CBASS

tiboot3.bin

MCU NAVSS

UART

Other MAIN

peripherals

MMC SD

MCU Peripherals

R5 FLOW

DDR

Notes:

MPU CL0

MPU CL1

DMSC

- R5: Start IPC

- M3: Load boardcfg

M3: Init IPC

- R5: UART Init

- M3: Copy sci.bin

- R5: Enable caches

- R5: in reset

- R5: Init MMC

- M3- sysfw start

ROM - 160K

M3: R5 out of reset

- R5: Load sysfw

(sci.bin + board cfg)

- R5: SPL start

A53_0

A53_1

A53_0

WKUP peripherals

SPL

A53_0 EL3

M3

IMEM

IMEM - 192K

L1D$ - 32KB

L1P$ - 32KB

L2$ - 512KB

DMEM

DMEM - 80K

MSMC

sci.bin

SPL

OC-MSRAM

DDRSS

ATF

SRAM/CACHE

DRU

OPTEE

BOOT_ROM

GPU

MCU_ARMSS

MAIN NAVSS

R5F0

R5F1

Dual

Lockstep

I$ - 16KB

GTC

D$ - 16KB

TCM - 64KB

CBASS

sysfw.bin

tispl.bin

MCU NAVSS

Notes:

UART

Other MAIN

peripherals

MMC SD

- R5: Enable GTC

-R5: Load tispl.bin

- R5: A53 out of reset

- R5: DDR Init

- Current state

MCU Peripherals

A53 FLOW

- A53_0: Start ATF

- Current State

- FS Init

- Jump to userspace

A53_0: Relocate u-boot

A53 non-sec: start IPC

- A53_0: Load kernel+

dtb

A53_0: Load u-boot.img

A53 non-sec: IPC start

A53 sec: start IPC

- A53_0: Start Linux

- A53_0: Init MMC

- A53_0: Start u-boot

- A53_0: Start SPL

- A53_0: SMP Init

- A53: Switch to EL1

- A53_0: Init uart

- Standard Linux Init

MPU CL1

MPU CL0

DMSC

ROM - 160K

A53_0

A53_1

A53_0

WKUP peripherals

A53_1 EL3

A53_1 EL2

A53_1 EL1

A53_1 EL0

A53_0 EL1

A53_0 EL2

A53_1 EL1

A53_0 EL0

A53_0 EL3

A53_0 EL2

A53_0 EL3

A53_0 EL1

A53_0 EL0

A53_1 EL2

A53_1 EL0

A53_1 EL3

SPL

M3

IMEM

IMEM - 192K

Image

L1D$ - 32KB

L1P$ - 32KB

u-boot

L2$ - 512KB

DMEM - 80K

DMEM

dtb

MSMC

OC-MSRAM

DDRSS

ATF

SRAM/CACHE

DRU

OPTEE

BOOT_ROM

GPU

MCU_ARMSS

MAIN NAVSS

R5F0

R5F1

Dual

Lockstep

u-boot

I$ - 16KB

GTC

DDR

D$ - 16KB

TCM - 64KB

CBASS

Image + dtb

u-boot.img

MCU NAVSS

UART

Other MAIN

peripherals

MMC SD

MCU Peripherals

Q & A

Q&A

Congratulations....!!!!

Now you are a boot flow master.

Yay..!!!

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