MicroVax 78032

Presented By

Miss Mattana Faikhao 56363949

Mrs.Suthad Sukjit 56364212

Encoding

Overview

1. The MicroVAX 78032 (otherwise known as the DC333) is a microprocessor developed and fabricated by Digital Equipment Corporation (DEC).

2. When clocked at a frequency of 5 MHz, the 78032's integer performance is comparable to the VAX-11/780

3. The microprocessor could be paired with the MicroVAX 78132 floating point accelerator for improved floating point performance.

4. The 78032 was used exclusively in DEC's VAX-based systems, starting with the MicroVAX II in 1985.

What is architecture CPU?

- Variable (1 to 56 bytes)

- The narmal-frequency clock output (CLK0) is generated from a double-frequency clock input to the chip from a standard oscillator.

- A one to two byte OPCODE specifies the operation, number of operands, and data type.

- After the OPCODE has indicated the number of operands, each operand is represented by an Operand Specifier.

- The Operand Specifier indicates the addressing mode for the operand and the first parameter. Any further parameters must then be read in following their designated Operand Specifier.

Opcodes

CISC Processor (Complex Instruction Set Computer) is a processor design where single instructions can execute several low-level operations (such as a load from memory, an arithmetic operation, and a memory store) or are capable of multi-step operations or addressing modes within single instructions.

* DC333 = Number of MicroVAX CPU

** KA63 = MicroVAX 78032 process with MicroVAX 78132

on KA630 board

- Instruction of code and variable length operand specifier are decode in parallel with other chip operation.

- The instruction prefetch and decode unit decodes prefetch instruction opcode store in a 8 byte queue after instruction stream data have pulled into the data path under microcode control.

Memory-Memory

MicroVax 78032

Addressing

: 6 addressing

Designed for nothing?

Type and size of operand

- Branching : Condition code

- Little Endian

The MicroVAX 78032 is the first VAX on a chip. Two custom gate arrays were also designed to reduce the size of the MicroVAX II CPU to one quad module: the Q-bus interface gate array and the MicroVAX 78032 interface gate array.

reference

THANK YOU FOR ATTENTION !

http://www.snipview.com/q/DEC_microprocessors

www.dcl.hpi.uni-potsdam.de/teaching/serveros/OpenVMS/03_VAX-Architecture.ppt 03_VAX-Architecture

https://en.wikipedia.org/wiki/MicroVAX_78032

https://books.google.co.th/books?id=Tn-oBQAAQBAJ&pg=PA29&lpg=PA29&dq=micro+vax+78032&source=bl&ots=AXgPoshmoR&sig=y_IC5knaMmURqR78W2Z51MUmm0o&hl=th&sa=X&sqi=2&ved=0CGsQ6AEwDmoVChMI7MzInP_SxwIVzB-OCh1YTALy#v=onepage&q&f=false

http://simh.trailing-edge.com/semi/uvax.html

http://pioneer.netserv.chula.ac.th/~tarporn/384/LabSheet/OSC.pdf

http://na5cent.blogspot.com/2012/01/big-endian-vs-little-endian.html