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Reset
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Coming up with the logic
Creating constraints
Implementing the design
Synthesizing the code
Programming the board
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Key States:
NS_GREEN_ARROW
NS_YELLOW
ALL_RED1
EW_GREEN_ARROW
EW_YELLOW
ALL_RED2
EMERGENCY
PEDESTRIAN
VHDL (VHSIC(very high speed integrated circuit) Hardware Description Language)
Architecture Declaration
Here, the module's internal behavior is set up, including the states it can be in, the clock frequency, and the durations of red, green, and yellow lights.
Entity Declaration
This part defines the signals used to communicate with the outside world, such as the clock, reset, emergency button, pedestrian button, and traffic light signals.
Process Statement
This is the core logic of the module, determining its behavior based on inputs. It initializes the module's state during reset and updates the traffic light signals on each clock tick.
Skills and Learning
The finite state machine (FSM) serves as the core control mechanism for the traffic light controller system.
The system transitions between various states to simulate different traffic scenarios and manage traffic flow efficiently.
VHDL Programming: Developed VHDL code to implement traffic light controller logic and functionality.
FPGA Synthesis: Synthesized VHDL code into hardware description for implementation on FPGA platform.
Simulation Testing: Conducted simulation testing to verify the functionality and performance of the traffic light controller.
Project Management: Coordinated tasks, timelines, and resources to ensure successful project completion.
Problem Solving: Addressed challenges and iteratively improved the design to meet project objectives.
Communication: Presented project updates, findings, and outcomes to stakeholders effectively
The system architecture comprises several key components that work together to regulate traffic flow and manage intersections.
This project, utilizes VHDL, a hardware description language, to design a digital traffic light controller. VHDL's ability to model complex systems allows for efficient traffic management, while the integrated emergency signal feature prioritizes safety. Built and simulated on an FPGA platform, this VHDL Traffic Light Controller offers a promising solution for adaptable and efficient real-world traffic management.
Faculty mentor: Professor Abhudima