The importance of OSH

Who are ASML?

- a Dutch company located in Veldhoven, Netherlands

- started as a joint venture of Phillips and ASMI in 1984

- heavy reliance on Carl Zeiss AG

- call their business model "Two companies, one business"

- dominating the photolithography market since the 90-s

- the only standing competitor in the sub 5nm range

Moore's Law

The architectural differences of ICs

What is an FPGA?

- Field Programmable Gate Array

- a hardware solution

- allows RTL design implementation

- uses LUTs as the foundation

- allows true concurrent process execution

- very fast

Who uses FPGAs?

- science labs like CERN

- EE labs, equipment like logical analizers, vector, signal, network and other test equipment

- medical equipment

- space equipment

- unknown...

Typical FPGA use example

Why does EUV matter?

- more transistors, due to shorter gate lengths

- better heat dissipation, due to power and voltage reduction

- smaller parasitics*

- reduced IC manufacturing cost**

*other problems occur instead

**at the price of billions of dollars of investments and a 10 year development cycle

How do they design these? O_O

Old school

What is Logic Synthesis?

- an abstraction between the algorithm specification and a transistor level implementation

- synthesis tool produces Register Transfer Level designs, based on the description

- can be used to produce real hardware like ASICs or virtual hardware like an FPGA bitstream

Synthesis, you say?

Open Source?

- NO!

- tools provided by Synopsys, Cadence and Mentor cost extreme $$$

Open Source!

- Yosys - a free and open source synthesis suite

- nextpnr - place and route tool

- Project IceStorm - Lattice Semiconductor bitstream generation

- SymbiFlow - open source FPGA bitstream generation (Xillinx)

- Chisel & FIRRTL

Open source IPs?

1198 projects (different IP-blocks)

333133 registered users

920 new registered users during last month (February)

~500 000 page views every month

~80 000 visitors every month

~5:30 (min:sec) Average time at website

~6 page views per visitor (average)

https://www.opencores.org/

A brief on HLS

- is a higher level abstraction, than RTL

- relies more on smart compilation passes, rather than on designer abilities

- brings agility by saving time and introducing shorter development lifecycles

- feels more like programming than hardware design

- more overhead

- RTL designs become too complex

Getting started with HLS

- System C (C derivative)

- Chisel (Scala derivative)

- OpenCL (based on C++) and other direct access hardware frameworks

Complex Instruction Set Computer

- executing several operations can be defined as a single instruction

- or capable of multistep operations or memory modes within a single operation

CISC Systems

- Mainframes (IBM System 360 / System Z, VAX, PDP-11)

- Legacy code executors (i386, x86-64)

Even in 2020s RISC is the future!

- concepts introduced in late 70s, early 80s

- a highly optimized, far less complex alternative to CISC designs

- memory access is provided with specific instruction and is not part of each instruction, like in CISC

- optimized for large number or registers

- highly regular pipeline

- instructions are usually single cycle!

LLVM/Clang

Why are Open ISAs important?

- It’s not an error of omission

- Nor is it because the companies do most of the

software development

- Neither do companies exclusively have the

experience needed to design a competent ISA

- Nor are the most popular ISAs wonderful ISAs

- Neither can only companies verify ISA compatibility

- Finally, proprietary ISAs are not guaranteed to last

So REALLY, WHY?

- Greater innovation via free-market competition

- Shared open core designs

- Processors becoming affordable for more devices

A NextGen ISA!

- simple architecture

- build on top of existing to save time

- learn from past mistakes:

- Leaving out too much

- Including too much

- Allowing current microarchitectural designs to

affect the ISA

What is RISC-V?

- RISC-V (pronounced "RISC Five")

- Development began at Berkeley University in 2008

- Base-plus-extension ISA

- Compact instruction set encoding

- Quadruple-precision (QP) as well as SP and DP

floating point

- 128-bit addressing as well as 32-bit and 64-bit

- FREE and OPEN!

Investors are not in doubt!

Investors are not in doubt!

Even Intel is on the rise!

Investors are not in doubt!

Investors are not in doubt!

Pre-10nm Manufacturing

OnDemand IC Production

Thank you!

Thanks for your time!