**Inverse Class F Power Amplifiers**

design by Dóri Sirály for Prezi

Inverse Class F

Concept of inverse Class F mode was introduced for low voltage power amplifiers designed for monolithic applications (less collector current)

Recently begun to pay attention to the inverse Class F amplifiers because of their greater efficiency.

Harmonic Impedance Conditions

DESIGN METHODOLOGY

In order to reduce the parasitics of the package and facilitate harmonic impedance optimization at the transistor output reference plane, a bare-die, Cree CGH40010F is used. The model developed for this transistor is focused on accurately predicting the on- and off-regions of the transistor characteristics

Parasitics such as drain-source shunt capacitance (Cout) and series inductance (Lout) should be compensated for to achieve rectangular waveforms in practical devices. in this case the inverse clase F power amplifier be designed at a frequency of 1.9GHz, to find the capacitor and inductor is swept frequency 1.8GHz and 2GHz.

**thanks**

Paola Katherine La Rotta Rodriguez

Sindy Lorena Lozano Espinosa

Advanced High Efficiency Power Amplifiers

UPTC

2013

This amplifier circuit uses open to even order harmonics and short circuits in odd order, and can achieve higher efficiency than a Class F, under conditions of restricted feeding voltage.

Dual to conventional Class F with mutually interchanged current and voltage waveform:

The voltage can be approximated by semi-sinusoidad half wave and current for a square wave

As a inverse Class F amplifier, it is decided to operate at drain bias voltage of 28V, which

is suggested by datasheet. The gate bias voltage of -2.677V is picked as indicated by the marker m2

The output impedance at 1.8 GHz (Zout (w1)) is de-j55.428 and 2GHz output impedance (Zout (w2)) is de-j48.782.

The above, clears the following system of equations, the Cout and Lout:

Using the ADS software, check if the values of the capacitor and inductor to eliminate parasites are correct device.

as we could observe the marker M1 and M3 about the imaginary part of the impedance is the same, in the same way M2 and M4, also the real part is zero

Second Harmonic Impedance Condition

Third Harmonic Impedance Condition

Fundamental Harmonic Impedance Condition

the condition to meet is that the impedance is a open circuit at the second harmonic.

Stub requires a 45 degree so that a frequency twice its electrical length is 90 degrees, which the Bias Tee can achieve this, but it is not necessary circuit.

The output fitting network device

Design of the input fitting network

total fitting network device

the condition to meet is that the impedance is a short circuit at the third harmonic.

Stub is required 30 degrees so that a frequency three times the electrical length of 90 degrees, and the impedance that the amplifier will be the one that is set by design to this case zero impedance

To finish out the network added a Transmission Line, which achieves zero the angles S (1,2) and S (2,1). To obtain the desired scattering matrix.

if the stub impedance is 90 degrees was found on the edge the Smith chart, while the transmission line moves me on the edge of the Smith chart, so that it can lead to short circuit or open circuit

Here, it is the design for the base load, the impendance is 30 we chose the device, from Gamma L designing a network controlling the first harmonic

Output load is 42.43 ohms, is the square root of two for the resistance to load by devices is 30 ohms ;the parameter S (1,1) is the Gamma In, for maximum power transfer requires the Gamma S Gamma is the conjugate of In, this way the network design of the amplifier power.

reflected power at port 1 to gate is zero, while the power transmitted from port 2 to port 1 is maximum. the graph shows the BEHAVIOR power (dB) as a function of frequency (GHz), observing the parameters S (1,1) and S (2,1) of the two-port network. Therefore, it follows that the parameter S (1,1) is the reflection coefficient at the input, so that the design frequency for the power tends to zero, while the S (2,1) is the parameter direct transmission coefficient, and seeks the input power is transferred to the maximum output for the design frequency. With the above we can see that the work done meets the required specifications, the curve parameter S (1,1) is the red curve and the parameter S (2,1) is the blue.

BIAS TEE

Is shaped by two wavelength Stub 45 ° and 90 °, a transmission line of 90 °, all three with a characteristic impedance of 50 Ω.

It is a matching network which is connected between the power supplies (Gate and Drain Transistor), where its function is to open circuit the even harmonics of the signal, and shorted the odd harmonics, considering that the fundamental frequency is located at 1.9 GHz, as shown in Figure

The maximum power added efficiency (PAE) of the power amplifier inverse class F is 83,169% and the output power is 41.577dBm. Furthermore, it has a power gain (Gp) of 19.561dB and a translucent (Gt) of 22.284dB gain.

The waveforms of current and voltage at the output of the device to the class F PA reverse, should have the following characteristics: the flow must tend to a square shape and a sinusoidal signal voltage truncated. Waveforms of voltage (blue line) and current (red line), which meet the design requirements is.

you can see the dynamic curves of CGH40010 (red color) device, which are generated as the available power of the source is varied.

Impedances views are shown from the inlet port designed for monitoring frequencies, which correspond to the first three harmonics. For the proposed design, it is expected that the class F power amplifier reverse, drive the load to the first harmonic of 42.43Ω, the second harmonic load is high impedance and the load of the third harmonic is zero impedance.

The maximum power added efficiency (PAE) of the power amplifier inverse class F is 76.224% and the output power is 40.918dBm. Furthermore, it has a power gain (Gp) of 16.432dB and a translucent (Gt) of 19.812dB gain.

you can see the dynamic curves of CGH40010 (red color) device, which are generated as the available power of the source is varied.

Impedances views are shown from the inlet port designed for monitoring frequencies, which correspond to the first three harmonics. For the proposed design, it is expected that the class F power amplifier reverse, drive the load to the first harmonic of 42.43Ω, the second harmonic load is high impedance and the load of the third harmonic is zero impedance.

Each block contains real inverse class F power amplifier

The waveforms of current and voltage at the output of the device to the class F PA reverse, should have the following characteristics: the flow must tend to a square shape and a sinusoidal signal voltage truncated. Waveforms of voltage (blue line) and current (red line), which meet the design requirements is.

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