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Copy of Embedded System Security
Transcript of Copy of Embedded System Security
Embedded Systems under low-power
and memory Constraints
New reconfigurable Middleware for
feasible adaptive RT-LINUX
Reconfigurable bus CAN
New protocol for feasible re-
configurable networked controllers
add OS tasks
Remove OS tasks
Activate a processor
Real Embedded Characteristic
An embedded system is tightly coupled of hardware (HW) + software (SW) to perform a dedicated system
How to get a feasible system after a reconfiguration scenario ?
The system should dynamically change its software in terms of new and added tasks
as well as hardware architecture without stopping its execution and without any
This is a new challenge in industry for the
next generations of embedded systems
We are asked to propose software and hardware solutions in order to:
Minimize the power consumption
Optimize the memory capacity
Respect real-time constraints
After applying a reconfiguration scenario, processor utilization may increase and local memory processors will be full.
Topology : Ring
Goal: Obtain a coherent system after applying
a reconfiguration scenario.
In this level we should validate the architecture that the microcontroller
desire to do it (tasks to be added/removed tasks)
Period modification of the message
Adjust the can speed
Tasks can be periodic and aperiodic
These tasks may:
Be with precedence constraint
Writing a paper for each contribution
Simulations and analysis for each
Working on other contribution like:
the reconfigurable routing in
Reconfigurable middleware in embedded platforms
New automatic agent-based techniques for reconfigurable MP-SoC
New reconfigurable Middleware for feasible adaptive RT-LINUX
Reconfigurable CAN in real-time embedded platforms
New protocol for feasible reconfigurable
In this presentation we have focused on different contributions.
We have presented the different proposed solutions for each contribution.
A simulations will be done as soon as possible to highlight the effectiveness of these solutions.
Dealing with the real-implementation on smartphone will be a future work
Multi-agent based architecture
An agent master: check the evolution of the system’s environment before applying software-hardware reconfigurations.
An agent slave: It is defined for each microcontroller to evaluate its energy consumption and its memory capacity.
Solution 1: Parameter modifications of the processor that theirs utilizations greater than 1.
Solution 2: Re-allocation of the tasks according to the
Solution 3: Removal of some tasks with lower priority.
Solution 4: Activate or deactivate of processors
Solution 5: Remove tasks from local memory and add
them to shared memory.
The different functions used in the
communication protocol are:
Level 1: architecture
If the microcontroller has the authorization to add/remove some tasks, then it pass to the second level
After having authorization to apply a new architecture with a given composition, we pass to the third level. Tasks of a new reconfiguration may have the need for access to a shared data . So we have asked to manage access to these data. Each microcontroller has a matrix of access to data according to its current configuration priority.
A table is defined for each task:
Micro_id : microcontroller identity
Id_tache : Id task
Pre : precedent task
Post :next task
Response : microcontroller answer
Every microcontrooler authorizes the new composition by putting 0/1 in the field "answer" based on priority matrix
Every STM have several tasks
The different tasks exchange message on
- When we add new tasks in controllers, new messages are added automatically on CAN, then some deadlines may be violated.
- A multi-agent based architecture is
proposed to check the correct transmission
- If some deadlines are violated, theses agent will propose some solutions.
Paramater modifcation of independent tasks
lambda_C of aperiodic tasks
Paramater modification of tasks
that share resources
Processor speed optimisation
(m,k) firm application
A reconfiguration request is charcterized by the following paramaters:
Micro_id : microcontroller(request sender) identity
config_id : reconfiguration to be applied identity
Response : the answer of the other microcontrollers
If all the resonses equal to 1, then the reconfiguration is applied
A simulator for RTLINUX
A tool for FPGA
A reconfiguration tool for bus CAN
Developement of an administrative
application for the network
It is defined for the whole system
It will control the evolution of the system’s
environment before applying software-hardware reconfigurations.
Is defined for each processor
controls a processor to check if after a
reconfiguration scenario will not increase a lot the
energy consumption and the memory or violate a particular deadline.
2 agents are defined for each microcontroller
Agent RA: Request agent
Agent CA: Controller agent
proposed solutions by the agents
Communication between agent
We have proposed:
EDF: to schedule the independent periodic tasks
FIFO: for the aperiodic tasks
IPCP: "Immediate priority ceilnig protocol" for tasks that share resources
MP-SoC is composed of :
Local memory for each processor
Rt-linux is not designed to be
This layer will manage the addition/removal/update of the periodic and aperiodic tasks
It will be in interaction with the kernel Linux